In using certain types of semiconductor fabrication equipment, alignment marks around the periphery of the wafer are required to properly orient the wafer in a lithography tool. While such marks minimize the chance of alignment errors, there is a disadvantage in that the alignment marks are often required to be made before any other processing occurs (and thus the alignment marks are sometimes referred to as “zero” layer alignment marks). Since the definition of alignment marks has to be finished before any further step can follow, the creation of alignment marks adds a distinct step to the whole process which is time consuming and costly, adding no value to the ultimate semiconductor devices being fabricated on the wafer.
The present invention seeks to provide an optimized process sequence which reduces the number of processing steps and complexity of prior art techniques for forming alignment marks. The invention is particularly suited for forming alignment marks in conjunction with semiconductor devices employing shallow trench isolation.